Gaya APA

Schneider, P., J., Clark, V., P. (1979). The Bugbook II Logic & Memory Experiments Using TTL Integrated Circuits Book 2 . Indiana USA: Howad W. Sams & Co., Inc.

Gaya MLA

Schneider, P., J., Clark, V., P.. The Bugbook II Logic & Memory Experiments Using TTL Integrated Circuits Book 2. Indiana USA: Howad W. Sams & Co., Inc, 1979. Text.